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July 25, 2022

​IC Substrate Technology Overview

IC Substrate Technology Overview
It is called an IC carrier board. A substrate used to package IC bare chips.
(1) Carrying semiconductor IC chips.
(2) Internal circuits are arranged to conduct the connection between the chip and the circuit board.
(3) Protect, fix and support IC chips and provide heat dissipation channels. It is an intermediate product that communicates between the chip and the PCB.
Birth: mid-1990s. Its history is less than 20 years. New integrated circuit (IC) high-density packaging forms represented by BGA (Ball Grid Array) and CSP (Chip Scale Packaging) have come out, resulting in a necessary new carrier for packaging - IC packaging substrate.
* Development history of semiconductors: electronic tube → transistor → through-hole assembly → surface package (SMT) → chip scale package (CSP, BGA) → system package (SIP)
*Printed board and semiconductor technology are interdependent, close, penetrate, and cooperate closely. Only the PCB can realize the electrical insulation and electrical connection between various chips and components, and provide the required electrical characteristics.
Technical parameters Layers, 2-10 layers; plate thickness, usually 0.1-1.5mm;
Minimum plate thickness tolerance*0 micron; minimum aperture, through hole 0.1mm, micro hole 0.03mm;
*Minimum line width/spacing, 10~80 microns;
*Minimum ring width, 50 microns;
*Outline tolerance, 0~50 microns;
*Buried blind vias, impedance, buried resistance and capacitance; *Surface coating, Ni/Au, soft gold, hard gold, nickel/palladium/gold, etc.;
*Board size, ≤150*50mm (single IC carrier board);
That is to say, the IC carrier board requires finer, high density, high pin count, small volume, smaller holes, discs, and wires, and an ultra-thin core layer. Therefore, it is necessary to have precise interlayer alignment technology, line imaging technology, electroplating technology, drilling technology, and surface treatment technology. Higher requirements are put forward in all aspects to product reliability, equipment and instruments, materials and production management. Therefore, the technical threshold of the IC substrate is high, and the research and development is not easy.
Technical Difficulties Compared with traditional PCB manufacturing, the technical difficulties that IC substrates have to overcome:
(1) Core board manufacturing technology The core board is thin and easy to deform, especially when the board thickness is ≤ 0.2mm, the process technology such as the structure of the board, the expansion and contraction of the board, the lamination parameters, and the interlayer positioning system need to make breakthroughs, so as to achieve super Effective control of thin core board warpage and lamination thickness.
(2) Microporous technology
*Including: open equal window process, laser drilling micro blind hole process, blind hole copper plating and hole filling process.
*Conformalmask is a reasonable compensation for laser blind hole opening, and the blind hole aperture and position are directly defined by the opened copper window.
*Indices involved in laser drilling of micro-holes: hole shape, upper and lower aperture ratio, side etching, glass fiber protrusion, glue residue at the bottom of the hole, etc.
*Indices involved in blind hole copper plating include: hole filling capability, blind hole voids, depressions, and copper plating reliability.
*Currently, the pore size of micropores is 50~100 microns, and the number of stacked holes reaches 3, 4, and 5 orders.
(3) Pattern formation and copper plating technology
*Line compensation technology and control; fine line production technology; copper plating thickness uniformity control technology; fine line micro-erosion control technology.
*The current line width and spacing requirements are 20~50 microns. The thickness uniformity of copper plating is required to be 18*microns, and the etching uniformity is ≥90%.
(4) Solder mask process* includes plug hole process, solder mask printing technology, etc.
*The height difference between the solder mask surface of the IC carrier board is less than 10 microns, and the surface height difference between the solder mask and the pad is not more than 15 microns.
(5) Surface treatment technology
* Uniformity of thickness of nickel/gold plating; both soft gold plating and hard gold plating process on the same plate; nickel/palladium/gold plating process technology.
* Lineable surface coating, selective surface treatment technology.
(6) Testing capability and product reliability testing technology
* Equipped with a batch of testing equipment/instruments different from traditional PCB factories.
*Master the reliability testing technology that is different from the conventional ones.
(7) Taken together, there are more than ten aspects of the process technology involved in the production of IC substrates
Graphic dynamic compensation; graphic electroplating process for copper plating thickness uniformity; material expansion and shrinkage control in the whole process; surface treatment process, selective electroplating of soft gold and hard gold, nickel/palladium/gold process technology;
* Core board sheet production;
*High reliability detection technology; micro hole processing;
*If the stacking micro-level 3, 4, 5, the production process;
*Multiple laminations; lamination ≥ 4 times; drilling ≥ 5 times; electroplating ≥ 5 times. *Wire pattern formation and etching;
*High precision alignment system;
*Solder mask plug hole process, electroplating fill micro hole process;
IC carrier board classification
differentiated by packaging
(1) BGA carrier board
*BallGridAiry, its English abbreviation BGA, spherical array package.
*The board of this type of package has good heat dissipation and electrical performance, and the number of chip pins can be greatly increased. It is used in IC packages with a pincount of more than 300.
(2) CSP carrier board
*CSP is the abbreviation of chipscale packaging, chip scale packaging.
*It is a single-chip package, light and small, and its package size is almost the same as or slightly larger than the size of the IC itself. It is used in memory products, communication products, and electronic products with a small number of pins.
(3) Flip chip carrier
*Its English is FlipChip (FC), which is a package in which the front of the chip is flipped (Flip) and directly connected to the carrier board with bumps.
This type of carrier board has the advantages of low signal interference, low connection circuit loss, good electrical performance, and efficient heat dissipation.
(4) Multi-chip module
*English is Multi-Chip (MCM), Chinese is called Multi-Chip (Chip) Module. Multiple chips with different functions are placed in the same package.
*This is the best solution for electronic products to be light, thin, short, and less than high-speed wireless. For high-end mainframe computers or special performance electronic products.
*Because there are multiple chips in the same package, there is no complete solution for signal interference, heat dissipation, thin circuit design, etc., and it is a product that is actively developing.
According to material properties
(1) Rigid board package carrier board
*Rigid organic packaging substrate made of epoxy resin, BT resin, and ABF resin. Its output value is the majority of IC packaging substrates. CTE (Coefficient of Thermal Expansion) is 13 to 17 ppm/°C.
(2) FPC package carrier board
*The package substrate of flexible base material made of PI (polyimide) and PE (polyester) resin, CTE is 13~27ppm/℃.
(3) Ceramic substrate
* Package substrates are made of ceramic materials such as alumina, aluminum nitride, and silicon carbide. The CTE is very small, 6-8ppm/℃.
Distinguish by connected technology
(1) Wire bonding carrier board
*Gold wire connects IC and carrier board.
(2) TAB carrier board
*TAB—TapeAutomated Bonding, tape and reel automatic bonding packaging production. *The inner pins of the chip are interconnected with the chip, and the outer pins are connected with the package board.
(3) Flip chip bonding carrier
*Filpchip, turn the wafer upside down (Filp), and then directly connect to the carrier board in the form of bumping (Bumping).

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