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System-in-package (SIP) means that different types of components are mixed in the same package through different technologies to form a system-integrated package. This definition has evolved and gradually formed. At the beginning, passive components were added to the single-chip package (the package at this time is mostly QFP, SOP, etc.), and then multiple chips, stacked chips and passive devices were added to a single package, and finally developed to a package Form a system (at this time, the package form is mostly BGA, CSP, etc.). SIP is the product of the further development of MCP. The difference between the two is that different types of chips can be carried in SIP, and signals can be accessed and exchanged between the chips, so as to have certain functions on the scale of a system; in MCP, stack The multiple chips are generally of the same type, and the memory that cannot access and exchange signals between the chips is the main one. On the whole, it is a multi-chip memory. 2SIP package overview There are usually two ways to realize the functions of the electronic whole machine system: one is system-on-chip, referred to as SOC, that is, the function of the electronic whole machine system is realized on a single chip; the other is system-in-package, referred to as SIP , That is, the function of the whole system is realized through packaging. Academically speaking, these are two technical routes, just like monolithic integrated circuits and hybrid integrated circuits, each has its own advantages, each has its own application market, and both are complementary in technology and application. From the product point of view, SOC should be mainly used for high-performance products with a long application cycle, while SIP is mainly used for consumer products with a short application cycle. SIP uses mature assembly and interconnection technology to integrate various integrated circuits such as CMOS circuits, GaAs circuits, SiGe circuits or optoelectronic devices, MEMS devices, and various passive components such as capacitors and inductors into a package to achieve integration. The function of the machine system. The main advantages include: the use of existing commercial components, the manufacturing cost is low; the period for products to enter the market is short; regardless of the design and process, there is greater flexibility; the integration of different types of circuits and components is relatively easy to implement . Figure 1 SIP Typical Structure System-in-Package (SIP) technology has been proposed in the early 1990s to the present. After more than ten years of development, it has been widely accepted by academia and industry, and has become one of the hotspots of electronic technology research and the main direction of technology applications. First, it is believed that it represents one of the main directions for the development of electronic technology in the future. The type of 3SIP encapsulation is distinguished from the design type and structure of SIP in the current industry. SIP can be divided into three categories. 3.12 DSIP package is a two-dimensional package of chips arranged one by one on the same package substrate. 3.2 Stacked SIP This type of package uses a physical method to stack two or more chips together for packaging. 3.33DSIP This type of package is based on the 2D package. Multiple bare chips, packaged chips, multi-chip components and even wafers are stacked and interconnected to form a three-dimensional package. This structure is also called a stacked 3D package. 4SIP packaging process The SIP packaging process can be divided into two types according to the connection mode of the chip and the substrate: wire bonding packaging and flip-chip bonding. 4.1 Wire bonding packaging process The main flow of the wire bonding packaging process is as follows: wafer wafer thinning wafer dicing chip bonding wire bonding plasma cleaning liquid sealant potting package with solder ball reflow soldering surface marking separation final inspection test packaging . 4.1.1 Wafer Thinning Wafer thinning refers to the use of mechanical or chemical mechanical (CMP) grinding from the back of the wafer to thin the wafer to the extent suitable for packaging. As the size of the wafer becomes larger and larger, in order to increase the mechanical strength of the wafer and prevent deformation and cracking during processing, its thickness has been increasing. However, as the system develops towards lighter, thinner and shorter, the thickness of the module becomes thinner after the chip is packaged. Therefore, the thickness of the wafer must be reduced to an acceptable level before packaging to meet the requirements of chip assembly. 4.1.2 Wafer cutting After the wafer is thinned, it can be diced. Older dicing machines are manually operated, and now the general dicing machines are fully automated. Whether it is partly scribing or completely dividing the silicon wafer, the saw blade is currently used, because the edges it scribes are neat, and there are few chips and cracks. 4.1.3 Chip bonding The cut chip should be mounted on the middle pad of the frame. The size of the pad must match the size of the chip. If the size of the pad is too large, the lead span will be too large. During the transfer molding process, the lead will bend and the chip will be bent due to the stress generated by the flow.

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